Ritu Shrivastava 2012 Analyst Day Presentation

April 1, 2012

This post is an experiment.

Below is the transcript of Ritu Shrivastava’s 2012 SanDisk Analyst Day presentation with slides.

I’m going to be out of the country for a few weeks and won’t be posting.

In a sense this post is a placeholder, but a placeholder worth pondering: Original source material on how SanDisk sees the next 10 years shaping up, technology-wise.

The plan is to follow this post with a post on ReRAM, the third prong of SanDisk’s three prong strategy, once I’m back.

**** Transcript Below ****

Jay Iyer: Thanks, Greg. So slight change in plans. We are running ahead of schedule and true to our core values, which is, one of them, which is, execute and exceed, we have done that so far. So I think we’ll cover one more presentation before taking our lunch break.

So the next presenter will be Ritu Shrivastava. He’s our Vice President of Technology Development. His responsibilities include process and device technology development in both our Milpitas, as well as our memory development facilities in Japan. He’s also a fellow of the Institute of Electrical and Electronics Engineers, so IEEE, as you may know, and has served as the CMOS Technology Editor for the journal IEEE Transactions on Electronic Devices.

Ritu has more than 30 years’ experience in the semiconductor industry in areas such as development and technology transfer of numerous generations of SRAM, DRAM, and flash memories. And he holds more than 25 patents. So with that, it is my honor to invite Ritu.

Ritu Shrivastava: Thank you, Jay, and welcome. Well, those 30 years, actually, dates me also. So over the years, I’ve worked in many different technologies, DRAM, SRAM, flash, et cetera, and I can tell you one thing. There is no exciting time like right now than has ever been before in the last 30 years of my technology development.

Just to give an example, I brought here, I’ve been in gadgets, and I’ve been in photography and videos and music, et cetera, so I can relate to enriching people’s lives that SanDisk’s mission is. So here’s a gadget’s relic from the past from mid-’85, ’84, ’85.

This is an HP-71B, which was the handheld computer, the best gadget of the time and very, very productive, a hit in Berkley. Really, that was a very big hit. Guess what memory modules it had? For some reason, I still have the box and the memory module.

It’s 4K. 4K memory, that’s all that was available when it was introduced. Please see right now what kind of memories we have. 64 gig, even 128 gig.

I paid $75 for it. So if you calculate per gigabyte, I think it probably comes to $20 million per gigabyte, okay? Flash did not exist then. Many of us used to meet at that time in Vale and non-volatile workshop trying to figure out, develop the non-volatile technologies.

Sanjay, Eli, Dan, many of the people at the forefront were there. And when the non-volatile EEprom, EEproms flash got developed, we used to wonder what will be the uses. We couldn’t find any mass volume kind of use for those technologies. And here we are. So this is, if you buy a SanDisk 64-gig flash drive, it’s probably about $1 per gigabyte, something like that. So I think I paid a little bit too much for this but this was really what I wanted at that time.

So anyway, with that, let me start my presentation. What I want to focus on is 10 years from now, how somebody else can say the same thing about today’s technology and today’s flash, et cetera.

So Sanjay already mentioned and talked about the 3-pronged approach that we have, 3-pronged strategy, which is the NAND scaling, continue NAND scaling as long as possible, work on future technologies, which are the 3D resistive RAM and the BiCS 3D NAND for us. And these will allow us to assure competitive advantage, to keep scaling the technology, to keep reducing the cost, to keep increasing the density so that we can enable many more new applications compared to even what we have right now.

So let me tell you where we are right now. This is the technology roadmap that you probably already have seen. The 24-nanometer technology is in volume production, has been in volume production. 19-nanometer technology is the workhorse for this year, 2012, and it’s doing very well in the fab, ramping up. We have been working on 1Y technology, which will be for next year. And our main goal is to be able to have technologies, which when in production, give us the smallest die size, highest density, best reliability and in time.

So 19-nanometer technology is in production. As an example, the highest density part that we have there is a 128-gigabit chip, which is an X3 3-bits-per-cell product. It is the highest density product in the world and the smallest die size in the world. That’s a very good achievement.

And earlier, you heard about vertical integration. Vertical integration allows these kinds of products, both X2 and X3, to be used in a variety of applications with very high reliability and performance. In fact, if you look at this product, it is, I’m very happy to say, it’s been accepted for presentation, publication in ISSCC, which is the premier design and technology conference, international solid-state circuit conference, and it will be presented there week after next. So for more details, you can tune into that.

Now how do we keep continuing with the scaling? So our view is that NAND scaling will keep continuing. However, there are many challenges there that we need to overcome and we’ve been working very well to overcome those challenges. In this slide here, I describe a couple of those.

Of course, the fundamental cell parameters have to be optimized, but these are the main ones that will determine how far NAND can scale.

So first one, of course, is the lithography. That is very critical. So the top right chart shows the cell X and Y dimensions. Obviously, those determine the final die size of the product, not just that, how you choose the scaling and X and Y dimensions also determines the reliability. If you keep scaling it very fast before it’s time, you might not have a reliable product, so you have to very carefully optimize what X and Y dimensions are.

The current lithography tools that we have in the fab, and those are available to anybody, the best ones are immersion lithography. And there’s a limit to X and Y dimensions to which you can scale using the existing lithography. It’s shown in the green quadrant there.

On the red side of the chart, the red quadrant, is the future lithography. That’s where you have EUV, you have different kinds of patterning, et cetera, but that gets very expensive and those technologies are not ready right now for production. So we have to scale the technologies intelligently. The cell size has to be scaled with care, so that we can have a smallest die size product with highest reliability and which is manufacturable. Publishing papers, et cetera can keep going on the red quadrant but when you talk about the actual production, that’s what we need to focus on.

The second consideration that every flash vendor has to go through is the physical limit. So in the middle picture there, I’m showing the conventional cell that is the workhorse of the industry, very much for all the manufacturers. But the tricks that we use with the process innovation, et cetera, are going to determine how much you can scale and at what point do you need to change the structure. So what I’m showing there is there is a cell-to-cell interaction that goes on and as it keeps scaling at some point, you’re not able to deposit the layer which isolates the 2 cells. At that point, the cell becomes unreliable. There’s too much interaction that goes on. And so we have to go through process innovations, which we are going through to extend the proven workhorse cell as long as possible.

The third limit is the electrical limit. When you keep scaling the cell, the number of electrons which store your information in the cell keeps reducing. So the plot on the bottom right in red shows as we go through different technology generations how the number of electrons is reducing, right? And of course, one of my, and our job functions, is to keep those electrons from getting lost, being there.

So as you see, they keep going down, and that is not good. So we have to, again, come up with process innovations where you change the structure of the process in a way that you keep the electrons as large as possible. And so there you see in the green chart, we’ve been able to do that. And that allows us to keep scaling.

So the bottom line is that there will be process innovations required. There will be, in each NAND generation technology, could be significant changes. But the infrastructure that we have in place for this conventional NAND, the more we can extend it, the better cost structure we’ll have. So solving these problems through innovations keeps our costs low, which is one of the main goals. Of course, we’ll change the cell structure when needed.

So we see that NAND scaling is going to keep going for a few more generations. And the innovations and process manufacturing technologies and the kind of vertical integration that you heard about earlier from Sanjay and others, in memory design, test, system-level solutions will allow us to extend this NAND roadmap.

And with that, we’ll keep continuing, delivering the smallest die, highest density, low cost, good reliability, et cetera.

So when we take all that into account, this is what we are projecting our roadmap will look like. And you are looking at, on the 2014, 1Z technology, 1Z NAND and maybe some beyond that.

And of course, in the meantime, we are making progress, good progress in our future technologies. Very aggressive post-NAND development work. So 1Y will be the technology for production for 2013. 1Z will come after that, and who knows how far we can keep going with that because when we will, because nobody really knows what the limits of NAND are. If you recall, I’m sure all of you know, when we were at 4x technologies, everyone was wondering, that’s the last node, then we went to 32, 24. Here, we are at 19. 19-nanometer is 190 angstroms. Gate oxides used to be 300 angstroms 15, 20 years back. Here we are in the horizontal direction with that kind of CD [commercial development?].

So nobody really knows how long NAND can keep scaling. So we have to keep trying and we have to be innovative. But we are aggressively working on the future NAND, future technologies beyond NAND, and I’d like to give a brief update on our 3D resistive RAM. So once you go beyond the electronic storage, we get into the realm of where we have to rely on material change.

So 3D resistive RAM is dependent on the resistance change of the material versus the electrons. And this approach, we believe, is the best approach for the long term. This technology, once we put in production, will keep going for a long time. However, the current promising approaches, that we have for this technology require EUV, extreme EUV lithography, which as you probably know, is not ready and still is in development.

But there are many other components to this technology that we still can work on and perfect, so that when the technology’s available for lithography, we can put this in production. And as an example, and we made good progress there. As an example, on the right chart there, you see the bit cycling yield. Cycling is when you go through, you take the material through low resistance and high resistance states and you keep cycling as a function of number of cycles. It looks very good. So we are very pleased with that. So this can provide us with production opportunities beyond 2015. And we are very excited about that.

The second technology which we’re working on, which is still a form of NAND but it’s a 3-dimensional NAND, so the NAND string here is vertical, which means that you can have a number of layers, one on top of the other. You can come up with products with extremely high densities, which are not possible by 2D NAND that we currently have.

Moreover, it utilizes the existing infrastructure. It does not rely, it does not need EUV. So you are able to take this technology, utilize the existing infrastructure and take it to production. Again, we are making progress here. We have had some good key developments on the process front. We have a 24-layer development test vehicle. By the way, for both the 3D resistive RAM that I showed earlier, that was also tested utilizing a test vehicle to look at all the process and device technology developments.

So here, we have got 24-layer structure. In the middle picture, you see the fully processed wafer. On the right-hand side, you see a picture which was taken in line. Again, please note that these are still in these process modules and technology. They’re still in development.

At the bottom, you’ll see something very interesting, which is storing 2 bits per cell. You see 4 states, distinct states that is required for the 3D RAM technology to be cost effective. And we are very pleased to see that we’re able to do that. So this could be a bridge to the 3D resistive RAM technology that I showed earlier. And if we’re able to complete this development and the timing is right then it can go into production using existing infrastructure.

Now let me change the topic a little bit. Earlier, I talked about different technologies. The question, of course, arises. Are these new technologies going to replace the applications that we have for NAND? And so here, I’m showing a spider chart, which shows 2 kinds of things. It’s kind of busy but I think you can see the black boxes with the red boundary. The attributes of technologies, so low cost per bit. One of the reasons why NAND has been so successful is because of scaling the technology and the cost reductions.

SanDisk alone in the last 20 years has reduced the cost by a factor of 50,000. 50,000. That’s quite a lot. Other technologies right now are not getting scaled like the NAND has been scaling. So low cost per bit is important. Endurance, you have the speed, and then you have the data retention.

Now different applications may require different combinations of these things. For example, if you look at the 1:00 o’clock position there, there’s an application for set-top boxes. I’m sure many of you have them. Set-top boxes keep storing data constantly. But you don’t read them that often. So the endurance requirement there has to be very high. But the data retention doesn’t need to be that high.

If you look at 10:00 o’clock position, there’s an application for navigation. I’m sure many or most of you have GPS systems. GPS requires reading all the time. There’s no writing, so why burden that application with high endurance kind of consideration or requirement? So you can trade off, one of the beauties of NAND is you can trade off performance, data retention, endurance and make it applicable to a given application.

That’s what is so powerful about NAND. So the spider chart shows you qualitatively, and actually, we have gone quantitative calculations too, of how this given technology or a given technology does against those different properties.

So if you look at the next one, which is BiCS, I showed and talked about that earlier, comes very close. In fact, in cost per bit, it’s even better. Obviously, once we start designing the systems, the circuit design architecture, you can optimize some of these things and maybe we can actually improve upon this. This one in yellow is the 3D resistive RAM. This is the reason why we think this is the technology of future, which can replace NAND. Most of the properties that you see here are actually better, can be better in 3D resistive RAM.

So this, in short, tells us that we have a very, very strong strategy, a 3-pronged strategy, which allows us continuation of scaling that we have going on right now on the NAND, push NAND as hard as we can. Obviously, we’ll have challenges but we need to solve them and use the existing infrastructure. We think that NAND will be the dominant technology for the rest of the decade.

We also think that technologies are very likely to coexist. I don’t envision where one day suddenly somebody has a very good technology and within 6 months or a year, you can replace something as strong and widespread and useful as NAND with the infrastructure that we have in the fabs, et cetera.

And that 3D resistive RAM will be the successor into the next decade. So I think we are positioned extremely well in terms of where we are, where we have to go in the short term and where we will be in the long term. And hopefully, this 4K to 64 gig someday will be multiple terabits, and we’ll all have to figure out what we’re going to use it for, like we were wondering about 20 years back. Thank you.

More Apple & SanDisk

March 18, 2012

Since January we’ve gotten a few more pieces to the Apple SanDisk puzzle.

Nothing definitive, but enough to warrant another post before moving on.

SanDisk Analyst Day added some info. The Kinnucan capers even more so.

2012 Analyst Day 

At this year’s Analyst Day in February, SanDisk’s OEM VP Dan Inbar used the slide below, “How is SanDisk Winning?”

“Memory” flanked by an iPad on the left and an iPhone on the right with “Winning” above.

I suppose these Apple products could simply be generic graphic representations of product categories, but a far more likely explanation is that this slide is a broad hint that SanDisk is, or soon will be, selling memory into both devices.

As mentioned previously, the only teardown of an Apple product that has revealed a SanDisk chip, that I am aware of, was an iPod Nano.

My guess is that the SanDisk chips have been missed along the way by the teardown shops. SanDisk NAND and Toshiba NAND are interchangeable and Toshiba NAND has been uncovered in many Apple teardowns including last week’s iPad 3 4G teardown by ifixit.

Ipad 3 logic board partial image below: the yellow rectangle: 16 GB 24 nm MLC Flash from Toshiba.

Dan’s presentation from Analyst Day, where he used the iPad-Memory-iPhone slide above:

“And this [winning] is being done with a lot of work and a lot of effort, which again, I’d try and share with you a bit, how this is happening. So obviously, the basic ingredient for all of SanDisk product is our memory. We need good memory, strong memory, advanced technology, scaled, et cetera. 


And to date, our raw memory is being used in many components today, as a raw component. This, from our point of view, is a certificate of the strength of our raw technology, our basic NAND memory.”

So, Sandisk could be selling some of it’s basic NAND memory into some iPhones and iPads. Not a particularly big deal, nor should it be.

Judging by SanDisk’s weak Q1’s results, any sales in this period to Apple were not substantial.

This was directly addressed in the Analyst Day Q&A:

“Doug Freedman, RBC Capital Markets: All right. Let me try one more then on the OEM front. One of the complaints, I think, investors have had is that there’s a question whether you’re exposed to the right end customers.

We’re looking at Apple and Samsung doing extremely well in the smartphone market. Your exposure there is clearly limited. The question really is what are you doing to broaden your customer base, broaden the platforms? You mentioned that you felt like you got caught in the Q1 being limitedly exposed even at the customers that you have, you’re working on expanding that. How do I think about going forward what that has done to your strategy?

Dan Inbar: Yeah?


Sanjay Mehrotra: Yes, absolutely.  


Dan Inbar: I wasn’t sure. Right at the bell. 


So yes, as we said, we have had some designs that didn’t go as strongly as we would like and others, that not necessarily we were a part of, were doing very well in the first half of this year. That said and I think if you go outside here, you can see that you can, you will see design wins at basically all these OEMs. And developing the right product, the right configuration for each of them is something that we continuously do. And we believe that we are very well-positioned for the second half, for a strong second half, including the names you mentioned and many others, of course.”

So SanDisk feels it is well positioned for a strong second half including Apple.

More raw NAND Apple sales aren’t particularly exciting in themselves. But throw in some Apple SSD sales, and it could get interesting. L&R would be welcome too.

We’ve got more evidence that the SanDisk 27 September 2011 Confidential Treatment Order was Apple, which could point to both Apple opportunities and L&R.

Kinnucan Caper

We can thank the FBI for this info. Apparently the FBI trumps CT Orders.

They say, the FBI always gets its man. In this case they did and  it was John Kinnucan, a Portland research analyst.

They really really wanted to get him. And get him, they did.

Mr. Kinnucan publicly taunted the FBI on television and in print for two years with follow-up phone calls .

Not a good idea.

Mr. Kinnucan is now awaiting trial, in jail.

Mr. Kinnucan curried favor with Donald Barnetson, a senior director at SanDisk. In return, Mr. Barnetson fed Mr. Kinnucan SanDisk juicy confidential info.

Central to the FBI insider-trading case are leaks of a legal dispute between Apple and SanDisk. Interesting in itself, but even more so in that a resolution was soon expected that would be positive for SanDisk’s business.

From page 15 of Court Documents, 16 February 2012:

“d. Later in the same conversation on September 10, 2010, the SanDisk Insider[Barnetson] told Kinnucan about certain confidential negotiations over a legal dispute between SanDisk and Apple that were expected to be finalized within 6 weeks, and expected to be positive for SanDisk’s business. The SanDisk Insider explained that once finalized, SanDisk would have to file a Form 8-K with the U.S. Securities and Exchange Commission to disclose material corporate events to shareholders and the public.  


e. Shortly after his conversation with the SanDisk Insider, Kinnucan contacted several BBR Clients and advised them against short selling SanDisk stock for the next six weeks.” 

A form 8-K is a very broad form used to notify investors of any material event that is important to shareholders or the United States Securities and Exchange Commission.

No form 8-K has been filed by SanDisk for any deal with Apple. Not even a whisper of any negotiations has reached the media.

So what happened?

My guess is that negotiations dragged out far longer than 6 weeks, and the final resolution resulted in the CT Order filed in the fall of 2011. My guess is that the dispute revolved around flash management software. SanDisk’s strength and key to Apple’s ability to use raw NAND solutions.

As to what SanDisk would have received from Apple, my guess is license and royalty payments, and business opportunities.

In Q4 SanDisk did receive a “one-time favorable royalty adjustment of $7 million.”  So that could fit.

Also James Brelsford, SanDisk’s Chief Legal Officer and VP of IP Licensing just received a $360,000 bonus for fiscal year 2011.

Make of it what you will.


The following believable rumors are worth watching.

Micron royalty talks apparently are still going on. Micron has likely avoided paying royalties because of their Intel partnership. Intel and SanDisk had/have a cross licensing agreement.

Intel just sold Micron its stake in two NAND wafer factories for approximately $600 million.

With the Intel shield now gone, the pressure might be ratcheting up on Micron.

SanDisk has guided for 2012 revenue of $6.2 billion to $6.6 billion, up from $5.66 billion in 2011. SanDisk expects that the majority of this revenue growth will take place in the second half of the year.

Rumor has it that this upside is solid because it is based on OEM design wins.

SanDisk continues to have its eye out for viable acquisition targets.

Apparently some Anobit enterprise SSD employees are interested in moving to SanDisk, including some that worked in the past at FLSH and SanDisk.

Yoram Cedar, SanDisk’s CTO recently left the company. Some have speculated that his departure might be problematic.

Apparently there were no issues. Yoram simply wanted to be involved in his son’s Internet start-up. His SanDisk option profits gave him the opportunity and he took it.

For the time being Yoram’s SanDisk responsibilities have been split between Atsuyoshi Koike and Ritu Shrivastava, two very capable individuals.

Apple & SanDisk

January 22, 2012

The Apple-SanDisk relationship continues to be interesting nonevent.

One of these days- or years, suspect we’ll officially hear more. Until then it looks like it’s going to be a connecting-the-dots game.

In this latest non-chapter, Apple acquired Anobit, an Israeli controller company with SanDisk/ M-Systems connections, and named SanDisk one of its 156 major suppliers.

For those interested in conspiracy theories, a good argument can be made that SanDisk is  building capacity dedicated to Apple.


Anobit billed itself as a NAND-based solutions provider, but basically it was a specialized controller company providing the signal processing technology required for NAND chips.

The company was smart, private and Israeli.

They were on my shortlist as a SanDisk acquisition target. SanDisk acquired Pliant instead.

An Israeli friend has told me, that he was told by a SanDisk guy, that SanDisk passed on Anobit because Anobit didn’t have anything to contribute.

Anobit’s expertise is in signal processing algorithms to improve the performance of flash-memory chips. Which at the end of the day is what SanDisk is all about as well.

Purportedly Anobit has more than 60 patent applications. Apple will be happy to have those in their IP vault. Most likely to be used for defensive purposes if required.

One of the more interesting Anobit subplots is Samsung. Samsung liked Anobit too. Enough to send big business its way. Anobit had a big contract with Samsung.

Samsung had turned to Anobit to deliver performance for its TLC, or 3-bit NAND.

From all I’ve been able to gather, even with Anobit’s help, Samsung wasn’t been able to deliver viable commercial TLC in volume. The problem apparently was the lack of integration of chip level expertise with signal processing.

To the best of my knowledge, SanDisk is the only player to have pulled that one off.

Anobit’s CTO was Avraham Meir. Prior to joining Anobit, Mr. Meir was VP Corporate Engineering at SanDisk, and prior to that CTO at M-Systems- acquired by SanDisk in 2006.

One has to wonder how many SanDisk company secrets moved from SanDisk to Anobit with Mr. Meir, an internationally recognized authority in NAND Flash technology.

Does Apple now own the secret ingredients behind SanDisk’s TLC success?

Personally, I don’t think so. That special sauce ingredient can likely be traced back through M-Systems’ X4 to the original Stratosphere technology. This is the same technology that Samsung tried to get ahold of in 2008.

First through outright acquisition of SanDisk. And when that failed, through claims of license rights through prior agreements with M-Systems. No luck there either.

In the arbitration hearings, Samsung put a value on X4- “billions of dollars.”

It appears that Samsung’s backup plan was to use Anobit.

If Anobit was particularly special, there should have been a bidding war including Samsung. If anything, Anobit’s price slipped.

Initial reports in early December, estimated Apple’s purchase price of Anobit at around $500 million. By late December it was down to $300 – $400 million. An Israeli friend was told by local VCs that the final price was under $300 million.

So why did Apple buy Anobit?

It looks like it was all about preserving the status quo. Apparently Apple has been using Anobit controllers for a while now for X2 MLC NAND and liked what they had.

One of the beauties of Anobit was that their controllers work nicely with NAND chips from all the major Apple suppliers: Samsung, Toshiba, SanDisk, Micron, Intel and Hynix.


Yep, as of 13 January 2012, SanDisk is now officially a major Apple supplier.

SanDisk showed up on Apple’s official 156 company list which “represent 97% of its materials and manufacturing spending.”

This is a bit curious, given that the only teardown of an Apple product which revealed a SanDisk chip that I am aware of, was an iPod Nano.

The likely explanation is that SanDisk chips have found their way into other Apple product lines along the way and these SanDisk chips have been missed along the way by the teardown shops.

After all, SanDisk NAND and Toshiba NAND are interchangeable and Toshiba NAND has been uncovered in many teardowns.

Given the current tension between Apple and Samsung, it’s not particularly surprising that Apple and SanDisk would be working together.

Moving forward, Anobit’s SanDisk connections could prove more complementary than competitive.

Anobit’s familiarity with SanDisk’s approach just might make SanDisk NAND all the more strategically desirable to Apple.

Along these lines, two items from September 2011 bear watching.

First Baird analyst Tristan Gerra reported that “SanDisk is building capacity dedicated to Apple”

Then a Confidential Treatment order was filed by SanDisk with the SEC.

Such a CT order allows a company, in this case SanDisk, to meet SEC filing requirements while keeping the relevant info secret.

If a material agreement had been reached between SanDisk and Apple, a CT order wouldn’t be unexpected, given Apple’s obsession with secrecy.

3D NAND and 3D ReRAM

December 4, 2011

Time to wrap up this first pass at 3D NAND. There are a couple of points which I didn’t get to in the first two posts, which I’ll touch on here. Of particular interest is the relationship of 3D NAND to future post-NAND memory technologies, specifically ReRAM.

Conceptually in many respects, 3D NAND is closer to a post-NAND technology than it is to NAND as we know it today. The slide below from a 2009 Toshiba presentation tells the tale.

From the left, floating gate NAND rolls along to where the path splits with ever smaller NAND geometries  above and 3D NAND and other post-NAND technologies below. Other post-NAND include PCRAM, ReRAM, MRAM, etc.

What’s interesting is that 3D NAND is on the post-NAND branch and not on the NAND branch. Apparently this is because for 3D NAND the NAND string is perpendicular to the Silicon Substrate and other post-NAND technologies will depend on a similar three dimensionality.

Another slide from this same Toshiba presentation makes the point a different way.

In the center is the BiCS 3D Technology. Other technologies, including NAND and ReRam surround BiCS as potential extensions of BiCS 3D technology.

The point here is that BiCS technology can be applied to various memories to produce low cost data storage devices. When applied to NAND, the result is 3D BiCS-style NAND. When applied to ReRAM, the result will be 3D BiCS-style ReRAM and so forth.

BiCS is short for Bit-Cost Scalable technology. It is a 3D design strategy and as such allows greater capacity per footprint, which in turn results in lower bit cost. BiCS uses “a multi-stacked memory array with a few constant critical lithography steps regardless of number of stacked layers to keep a continuous reduction of bit cost. In this technology, whole stack of electrode plate is punched through and plugged by another electrode material.”

Another Toshiba slide from this same presentation graphs the relation between capacity and bit cost. As one would expect, the more layers, the lower the cost. With BiCS, more layers and hence lower costs per bit can be achieved.

BiCS Flash appears to have the potential of a 10 Tbit/ chip.

At the bottom of the slide, Toshiba innocently wonders whether the market would be interested in such “huge” capacity?

Given cloud data center demands today, I doubt anyone is worrying about that one today- If the cost is right.

Toshiba has it right. Future trends will primarily be driven by cost per bit. The technology that will provide the most bits at the lowest cost will succeed.

Cost reduction is the most important issue.

For anyone interested in this Toshiba presentation, here is the link.

3D Resistive Random-Access Memory (RRAM)

RRAM and SanDisk/Toshiba’s 3D R/W technology deserves it’s own post, which hopefully I’ll get to in the not so distant future.

Suffice it to say, that it sure sounds like today SanDisk/Toshiba’s 3D R/W is RRAM.

Yoram apparently said as much at this year’s Flash Memory Summit:

“Further in the future, chip makers including SanDisk are developing 3-D structures that use changes in resistance to create denser chips. But the so-called resistive RAM will require EUV tools, he [Yoram Cedar] said.”

SanDisk has been looking for a new manager for its “3D ReRAM” team since August.

The interrelationship between BiCS 3D NAND and 3D RRAM bears watching.

Toshiba and SanDisk have licensed or otherwise invested in each other’s 3D technologies and today are co-developing both.

In 2008 SanDisk licensed it’s 3D R/W technology to Toshiba.

Then in Q1 2011, SanDisk “made an incremental strategic technology investment with Toshiba that covers a variety of technologies including a three-dimensional NAND architecture, known as Bit Cost Scalable or BiCS, which Toshiba had been developing independently.”


Many companies have been working on RRAM, for a long time. A very, very long time- which in some respects is a good thing.

Most importantly, the patents on the basic RRAM switching concepts apparently have expired.

The slide below is from a Deepak C. Sekar presentation. Deepak is Chief Scientist at MonolithIC 3D Inc. He also spent almost three years at SanDisk working on both NAND and 3D crosspoint memory.

Deepak makes three points about RRAM IP in the slide above:

Patents, if any, on the basic switching concepts have expired.

Good patents on more advanced concepts exist (eg) Pt-replacement approaches, array architectures, doping, etc.

IP scenario for RRAM a key advantage. Other resistive memories have gate-keepers (eg) Basic patents on PCM, CB-RAM, STT-MRAM fro Ovonyx, Axon Technologies, Grandis. 

I suspect SanDisk and Toshiba have a particularly nice hand of good patents on the more advanced RRAM concepts, specifically array architectures.

The slide below is from SanDisk’s 2010 Investor Day.

Eli makes the point that  SanDisk holds “Fundamental patents in 3D diode arrays (apply to most 3D approaches)”

I’m going to end with this slide from the IMEC consortium. Its a nice summary showing floating gate NAND, 3D Vertical NAND, and RRAM graphed against Cost/Bit and chip capacity.


Here is the article where the slide above was taken. Apparently Toshiba/SanDisk hasn’t signed up for the collaborative effort.

“IMEC is working collaboratively with major memory manufacturers including Elpida, Hynix, Micron and Samsung on both flash and follow-on memory roadmaps

Toshiba [Sandisk] is a notable absentee from the program.”

There could be many reasons why Toshiba/SanDisk wouldn’t be interested in working with IMEC.

One would be that Toshiba/SanDisk feel they have the inside track on the roadmap.

More 3D NAND

October 9, 2011

3D NAND has the potential and the promise to supplant 2D planar NAND.

Whether it will or not remains to be seen. Challenges remain leading up to commercialization.

But the race is certainly on.

Equipment makers, such as Novellus, are saying that 3D NAND pilot lines will likely be up and running in 2013 and if all goes well volume production will commence a year later in 2014.

So what’s the rush?

2D NAND, is reaching the end of the line.

No other technologies are ready.

There are mega-markets there for the taking for the winners.

One particularly lucrative strategic market seems tailor made for 3D NAND: SSDs.

The slide below from this year’s SanDisk Analyst Day tells the story. The grey line is the cost of a 128 GB SSD. The red line is the cost of a 1 TB Hard Disk Drive (HDD). The two are considered to be rough equivalents when SSD advantages are factored in.

Today OEM SSD costs are still too high for mass SSD adoption, when compared to HDDs.  But SSD costs are dropping while HDD costs are holding steady.

Today HDDs hold a $50 cost advantage, but this will disappear sometime around 2014- just when 2D planar NAND cost reduction flat lines.

For those with commercially viable 3D NAND, the SSD cost reduction promises to continue down, while HDD costs hold level:

“Tim Archer, the Novellus chief operating officer, said the company has developed tools capable of  “making 3D NAND technology viable.” By vertically stacking NAND cells, memory vendors could get back on track with the needed reductions in the NAND cost per byte.

Armed with higher densities from vertically stacked bit cells, NAND memory vendors will be able to price solid-state disk (SSD) memory at a roughly 2:1 ratio with hard disk drive storage. “At 2:1, we will start to see a massive conversion to SSDs. 3D NAND will have a huge cost advantage,” Archer said.”

In 2014, even before “massive conversion to SSDs”, the SSD market looks like it will exceed $13 billion. Up from $5.8B in 2011. Gartner’s projections below:

Those with their own NAND, and 3D NAND in-house, will hold a huge cost advantage.

As discussed in the last post, this is likely a very short list.

If Toshiba’s P-BICS lives up to its promise, SanDisk will be a player.

That said, it’s going to take more that just low cost chips to prevail in all three segments of the SSD market. Products are where the rubber meets the road.

SanDisk appears to have tablets and other small form factor SSDs covered in-house. Enterprise SSDs appear to be covered thanks to the Pliant acquisition.

The only missing piece seems to be the consumer PC SSD segment.

While it’s entire possible that SanDisk will be able to tweak its existing SSD products or bring Pliant’s expertise into play, there is another option. SanDisk could simply buy its way into a leadership position.

SanDisk has the cash in hand for another acquisition.


At the end of Q2 2011, SanDisk had $5.28 billion of cash and short and long-term marketable securities.

SanDisk estimated that 2011 capital investment in fab and non-fab equipment would be $1.4 to $1.6 billion. At the end of Q2 the estimated cash requirement for these investments remained at $800 to $900 million for the year, of which SanDisk had spent $361 million in the first half.

So SanDisk only needs another $540 million or so for fab capital investment for the remainder of 2011.

And SanDisk’s business continues to pile up the cash.

Q2 2011 cash flow from operations = $269M
Q1 2011 cash flow from operations = $399M
Q4 2010 cash flow from operations = $359M
Q3 2010 cash flow from operations = $379M

In recent conference calls, analysts have taken to asking what SanDisk plans to do with it’s “excess cash”, which has “has been building quite steadily.”

Judy Bruner’s last response from the Q2 2011 conference call:

“As I’ve indicated before, we’re a very capital-intensive business, and we have a fair amount of capital expenditures ahead of us as we build Fab 5 over the next several years. So capital use for our capacity is the #1 use of that cash. And then in addition, we, from time to time, do make strategic investments in other areas and the Pliant acquisition is a good recent example of that. And there can be other kinds of technology investments, such as the technology investment that we made in the first quarter with our partner, Toshiba. So those are the primary intended uses of our cash, which is at a comfortable level. In terms of buybacks, we have done buybacks from time to time, and I don’t rule out that, that’s something that we could do in the future. We do not, at the present, have a buyback plan in place.”

So no buybacks, but further acquisitions are a distinct possibility.

Potential Acquisitions

SanDisk has the cash to shop in these turbulent days. An enviable position to be in.

The missing piece for SanDisk is the consumer SSD segment. The key is the controller.

On its own SanDisk hasn’t done much. Maybe SanDisk can use or re-work the Pliant controller for consumer SSDs.

It might be a lot easier though, to simply acquire a proven winner.

Anobit is one possible acquisition target. Anobit is Israeli, and Anobit’s CTO is Avraham Meir who had significant responsibilities at both SanDisk and msystems.

The problem with Anobit is their strong Samsung connection.

SandForce is another, maybe even more tempting target.

SandForce is probably better known among analysts and within the consumer SSD market that Anobit.

A SanDisk acquisition of SandForce would likely be well-received in the investment community.

Lazard’s description of SandForce, 07.14.11 SSD report:

“SandForce is a fabless semiconductor company that sells SSD processors, and more specifically the controllers. SandForce has a significant market share of SSD processors in the mainstream PC SSD and higher-end enterprise server and storage vendor markets. We view SandForce as well positioned in the space. It has controllers for both enterprise in players like SMOD [smart modular technologies] and Viking. In addition, LSI is using SandForce PCIe technology in its system. On the PC SSD, the company has largely teamed up with OCZ, Kingston, and Corsair…

SandForce SSD Processors use DuraClass technology with RAISE and patent and patent pending DuraWrite to drive ubiquitous deployment of volume flash memory into primary and I/O intensive data storage applications. SandForce DrivenTM SSDs optimize mission-critical application reliability, IT infrastructure ROI, green power preservation, and everyday computing user experiences. Founded in 2006, SandForce is funded by leading venture capital investors and first tier storage companies.

SandForce is one of the leading controller companies in the SSD space and has largely focused on the PC universe.”

There are very believable rumors that a new upcoming Intel SSD will use a SandForce controller.

There has even been talk that Intel might be interested in acquiring SandForce, but this is probably unlikely.

Initially Intel’s SSDs used Intel-designed controllers. Recently Intel has started using third party controllers (Marvell) in their better performing SSDs. Intel’s in-house controllers don’t seem to be keeping pace with the competition.

Intel either isn’t committing the resources to controller design or simply doesn’t have the vision. The writing on the wall. Intel has lost it’s SSD edge- in NAND and in SSD controllers.

With no built-in advantage in SSDs, it follows that Intel wouldn’t be all that interested in acquiring SandForce- which on its own wouldn’t put them over the top. If this is how it goes, there will be one less SandForce suitor with deep pockets.


SandForce is located in Milpitas CA, as is SanDisk. The latest SanDisk SSD uses a SandForce controller – the first time SanDisk has used a third party controller.

The controller world is going to change with the arrival of 3D NAND and then again with post-NAND technologies.

Controller companies such as SandForce must be getting edgy.

The worst case scenario for them would be to end up on the outside looking in.

It would be very surprising if SandForce and SanDisk haven’t been talking acquisition.

SandForce has a great reputation and if SanDisk could pull this one off, they would be sitting pretty for consumer SSDs. Synergies would likely be good with Pliant too.

We shall see.


September 18, 2011

NAND as we know it is reaching the end of the line. It’s been a good run.

But Judgement Day is Coming!

2014 looks like the year. Not so far off.

3D NAND looks like the technology ready to pick up where 2D NAND leaves off.

Post-NAND technologies like 3D resistive RAM, Ferroelectric RAM, MRAM, and Phase Change Memory (PCM) are not ready for prime time. This appears to leave the market with 3D NAND.

The thinking is that 3D NAND will be a replacement technology spanning between 2D planar NAND and whichever post-NAND technology emerges down the road. 3D NAND’s reign looks to be relatively short- lasting five to eight years.

3D NAND is true vertical NAND cell stacking not to be confused with chip stacking in a multi-chip package. In 3D NAND, NAND layers, not chips, are stacked in a single chip.

In many respects, 3D NAND is evolutionary, not revolutionary. The good news is continued cost reduction, smaller die sizes and more capacity. Also, installed NAND toolsets in the wafers fabs can, for the most part, be reused, thereby extending the useful life of fab equipment.

The bad news is that this 3D technology is still basically NAND with all its inherent limitations of data reliability and performance.

The wrinkle is that each of today’s NAND players has a different approach to 3D NAND.

Toshiba/SanDisk and Samsung are each developing variants of charge-trapped flash technology. Toshiba calls its 3D NAND: Pipe-shaped Bit-Cost Scalable or P-BICS.


Samsung dubs its 3D NAND: Terabit Cell Array Transistor or TCAT.


Hynix is pursuing a vertical floating-gate structure.

Micron hopes to transfer its DRAM expertise in deep trenches to 3D NAND.

In addition, Macronix is developing yet another 3D NAND charge-trapping technology based on its BE-SONOS technology.

This fragmentation is going to create winners, losers and chaos.


Its going to take deep pockets to hit the ground running. Samsung and Toshiba/SanDisk  have the resources, as well as the expertise and mind-share with equipment suppliers to make a go of it.

They’ve also both had R&D engineering teams hammering away at the problem for a while now. Toshiba since 2007. Samsung apparently since soon thereafter.

Both TCAT and P-BICS are similar charge-trapped flash technologies with similar structures. Samsung and Toshiba have been engaging in a war of words since at least 2009 on which approach is superior.

SanDisk is late to the 3D NAND party, but looks positioned to ride Toshiba’s P-BICS coattails.

In April of this year in the Q1 SanDisk conference call, Sanjay announced that SanDisk would be joining forces forces with Toshiba to co-develop P-BICS.

Sanjay’s comments:

“In the first quarter, we made an incremental strategic technology investment with Toshiba that covers a variety of technologies including a three-dimensional NAND architecture, known as Bit Cost Scalable or BiCS, which Toshiba had been developing independently. We believe that SanDisk and Toshiba joining forces to co-develop BiCS will allow us to further build on our past decade of successful development of multiple generations of NAND flash technologies.

BiCS, if successfully developed and commercialized, can leverage the installed NAND toolsets in the wafers fabs very well, thereby extending the useful life of fab equipment. We expect BiCS to enable further memory cost reductions beyond the future 1Y or subsequent scaled NAND, until 3D Read/Write memory, which remains our ultimate goal, is fully ramped into high volume production.”

SanDisk’s incremental strategic technology investment with Toshiba in Q1 2011 was $115 million.

My guess is that SanDisk held off this long before backing 3D NAND because it believed that its 3D Read/Write memory based on scalable crosspoint diode arrays would be ready.

EUV technology appears to be critical for this post-NAND technology, and EUV is late.

Tick Tock.


Time will tell whether Macronix, Hynix, and Micron have what it takes for 3D NAND, but its going to be tough, especially if Samsung and Toshiba/SanDisk don’t stumble.

Today Samsung and Toshiba/SanDisk together account for about 75% of NAND production (by bits). Hynix and Micron/Intel together produce the remaining 25%.

Macronix isn’t even on the charts.

Samsung and Toshiba/SanDisk enjoy the economies of scale and R&D budgets that go with their market share.

If there’s a canary in this mine, that would be Micron’s NAND partner Intel.

While Micron has recently been talking up 3D NAND, there’s been nary a peep (that I’m aware of) from Intel.

This would be consistent with Intel’s retreat from the NAND business itself. Intel hasn’t contributed a dime towards the ramping joint Micron/Intel IMFS Singapore NAND fab in the last year or so. Micron on the other hand has had to pony up $1.565 billion.

This joint venture started off essentially 50/50. Today Micron’s ownership percentage is up to 86% (info from SEC filings).

A couple of years ago, Eli Harari summarized the challenges that the Micron/Intel (2D) NAND JVs faced- “It is tough to be number 4 in a rough neighborhood.”

It’s not going to get any easier with the arrival of 3D NAND and post-NAND technologies.

My guess is that Intel saw the writing on the wall, looked carefully at it’s options and contractual obligations, and has decided to tread water until a clean exit can be executed.

Clearly the world isn’t going to end as 2D NAND runs out of steam. The existing fabs even without 3D NAND are going to keep on chugging along throwing off a long tail of cash for years.

That said, the uncertainty of what’s coming next is going to loom. The whole NAND ecosystem is going to increasingly feel this pressure. Smaller players are particularly vulnerable. Especially, in an uncertain economy.

The Wall Street Journal noted last week that: “More than half of the U.S.-based companies making their domestic stock-market debuts this year are trading below their offer price, an ominous backdrop for any companies hoping to come public.”

Multi-billion dollar emerging markets are there for the taking. The technological roadmap is uncertain.  Sounds like a recipe for chaos.

With chaos comes opportunity- especially for those like SanDisk positioned to emerge as winners. I’m going to stop here, and in my next post look at what SanDisk’s next move might be to complement the Pliant acquisition.

When the going gets tough, the tough go shopping.

NAND Technology Roadmap

July 3, 2011

Here comes the home stretch.

1x … 1y … 1z

End of the alphabet.

1x or 19nm will be in full swing next year in 2012.

1y, around 15nm, is scheduled for 2013.

1z, likely the last generation of NAND, could make its appearance 2014-ish.

What then?

It’s looking ever more likely that NAND will will go 3D, leveraging the existing infrastructure. But that’s another post.

This post is going to briefly review the end of the world as we know it- the last three generations of 2D NAND.

It’s worth noting that SanDisk and Toshiba have pulled in their endgame schedule.

Implying that they have figured something out. Both for their NAND technology roadmap and the thereafter.

This should be all good news. But they still have to execute.

1x, 1y, 1z

Last year SanDisk announced that 1x was was going to be a late 2012 story.

The graphic below- SanDisk’s NAND Roadmap- is from the SanDisk Investor Day 2010.

Transitions roll right along 43nm ⇒ 32nm ⇒ 24nm, then there is a year+ gap, from late 2011 to late 2012, before 1x and then nothing thereafter.

Compare the above to the graphic below from this year’s Financial Analyst Day in February. Both graphics run through 2013.

1x has been pulled in almost a year: from the second half of 2012 to late 2011. 1y which is nowhere to be seen in the 2010 graphic, now appears mid 2013.

If this weren’t enough, in May, Toshiba noted that mass production of 1x would start even earlier- this month in July.

Up until May the SanDisk/Toshiba party line had been that Fab 5 would start with “leading-edge 20-nanometer generation, with subsequent generations to follow.” Translation: 24 nanometer.

This appears to have changed according to Morgan Stanley in their Toshiba report of 25 May:

“TOSHIBA shows confidence in its competitiveness, with ~70% of the OP growth targeted in its new business targets for F3/11-3/14 coming from electronic devices, and the expectation of huge demand for NAND ahead. In this respect, we are positive on comments that 19nm mass production will start in July, ahead of competitors, and that process development for 1Ynm (the generation after 1xnm [i.e., 19nm]) and 1Znm (the generation after 1Ynm) is on track. (This is consistent with SanDisk’s comment that floating-gate NAND can be extended to at least 1Ynm, using existing immersion lithography.) Assuming continued growth for smartphone & tablet markets, we can expect a big jump for NAND margin in Semiconductors: NAND 19nm mass production timing was updated from ‘the Sep Q’ previously to July. Mass production starting at Yokkaichi Y5 in July and shipments starting in August.”

It sure sounds like Fab 5, Yokkaichi Y5, will be starting up in July with mass production at 1x, 19nm.

It makes eminent sense that Fab 5 start with 1x, and has for a while now.

It is also encouraging that Morgan Stanley reports that the process development for 1y and 1z are “on track,”  using “existing immersion lithography.”

It wasn’t that long ago that such scales were only considered feasible using extreme ultraviolet lithography, or EUV.

SanDisk/Toshiba appear to have figured out how to stretch the immersion lithography envelope all the way to the end of the alphabet. Likely through multiple patterning and various lithography techniques with a few other tricks thrown in.

These other tricks no doubt include adaptive flash management (AFM) and error correction capability (StrongECC).  Both AFM and StrongECC are proprietary and patent protected.

AFM and StrongECC are purportedly behind SanDisk’s success with three bit per cell memory (X3). To date, the competition doesn’t appear to have an answer.

As NAND moves below 20nm, performance and endurance will continue to deteriorate.

NAND producers could soon face some of the same challenges in scaling MLC as they face today in delivering viable X3.

This last dance could get interesting.

In any case, if SanDisk can deliver, the payoff will be in product gross margins.

Going from 32 nanometer to 24 nanometer has given SanDisk a chip cost reduction of 30% to 40%. Going from 24nm to 19nm should be a tad less, but nonetheless significant.

Something to look forward to in the first half of 2012, when 19nm yields are likely to become mature.